High-Speed ADC Offers 16 b At 200 MSamples/s

Analog-to-digital conversion plays a major role in many electronics systems, especially when signal processing is performed in the digital realm. The audio world has been accustomed to 16-b resolution at the audio standard sampling rate of 44.1 kSamples/s. But for radio-frequency (RF) signals, the road to high-resolution sampling has represented a much longer journey because of the sampling speeds needed to achieve such high resolution for RF signals. That wait is over, however, since Texas Instruments has taken the wraps off its model ADS5485 analogto- digital converter (ADC), which delivers 16-b resolution at maximum sampling rate of 200 MSamples/s. With its speed and resolution, the ADS5485 is well suited for applications in general data acquisition, medical imaging, radar systems, software-defined radios (SDRs), and in test equipment.

The ADS5485 (see figure) will aid applications in a wide range of fields, including in industrial, commercial, and military areas. It provides as much as 100-MHz differential input bandwidth for capturing input analog signals with 16-b fidelity. It has a 3-dB analog input bandwidth of 730 MHz with a differential input voltage range of 3 V peak to peak. The signal-to-noise ratio (SNR) is 75 dB full scale (FS) for a 70-MHz analog input signal and 74.4 dB FS for a 230-MHz analog input signal. The spurious-free dynamic range (SFDR) is -87 dBc for a 70-MHz analog input signal and -73 dBc for a 230-MHz analog input signal. Second harmonics are -95 dBc for the 70-MHz input signal and -73 dBc for the 230-MHz input s ignal . (Comparing this performance to other commercially available ADCs can be a challenge, but there is help in understanding differences among manufacturers as pointed out in an application note from Texas Instruments, detailed on p. 109.)

The low-noise data converter, which is based on the firm’s BiCom3 complementary bipolar process, is designed for use with a +3.3- and +5-VDC supplies, typically drawing 310 and 126 mA, respectively. It includes a power-down mode to cut power consumption to only 70 mW. The ADC provides LVDS-compatible digital output signals following conversion of input analog signals. An on-board differential input buffer amplifier provides isolation between a source and the internal track-andhold (T/H) amplifier, while an internal reference generator helps simplify system design. An internal dither circuit can be switched on or off as needed to help improve SFDR performance. The ADS5485 ADC provides outstanding accuracy, with typical differential linearity error (DNL) of only ±0.5 least significant bits (LSB) and typical integral linearity error (INL) of ±3 LSB.